Via density might be more clearly called "via coverage". It is the fraction of the overlap area between two metals that is covered by the via layer, if there is in fact a via between those two layers. The design rules for a process often specify a minimum coverage vias.
Where this becomes a problem is tying nodes to exceptioanlly wide rails, such as power rails. There is often inadvertent coverage of the wire used just to get into position for a via. In a multi-layer via, some additional area may need to be added on the via layer that contacts the wide rail.
5:25:16 PM  Categories: Cadence Knowledge-log
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