Increasing storage density by packing more than 0 or 1 in a single memory cell is an appealing idea. Now, "researchers from the University of Southern California and NASA have built a prototype molecular memory device that stores three bits in the same spot." Each memory cell is a field-effect transistor (FET) made from a 10-nanometer-diameter indium oxide wire. By applying current to a gate electrode, the nanowire can have eight discrete levels of electrical conductance, therefore representing the eight combinations of 3 bits. The prototype can retain data for 600 hours and provides a data density of 40 gigabits per square centimeter. The researchers think they can reach a density of 400 gigabits per square centimeter within 5 to 10 years.
"We can store three bits of information in one memory cell," said Chongwu Zhou, an assistant professor of electrical engineering at the University of Southern California. "This multiplies the storage density without increasing the device footprint."
A memory chip based on the researchers' prototype would be able to hold 40 gigabits, which is a little more than a DVD's-worth of data, per square centimeter, and the method has the potential to hold 10 times that. Today's flash memory chips hold of about 1 gigabit per square centimeter.
Here are the essential details about the prototype device.
Each memory cell consists of a field-effect transistor made from a 10-nanometer-diameter indium oxide wire. Current applied to a gate electrode produces an electric field around the nanowire, which lowers the nanowire's electrical resistance, allowing current to flow through the nanowire.
The nanowire in the memory cell is covered in molecules of an organic compound that adjust the nanowire's electrical conductance to eight discrete levels. These levels represent the eight possible combinations of three bits.
||This diagram represents molecules attached to a nanowire field-effect transistor (FET). The assembly forms a memory cell that can store three bits rather than the standard single bit (Credit: University of Southern California).|
When will we see this kind of memory inside our computers and other gadgets?
The multilevel molecular memory could be used practically in 5 to 10 years, said Zhou. "Substantial development work is needed to push the performance even further and to develop a fabrication process amenable for mass production," he said.
For more information, the research work has been published by the Applied Physics Letters on March 15, 2004. Here is a link to the abstract of this paper named "Multilevel memory based on molecular devices."
And if you're interested by this subject, you can read about another approach to melecular memory in a previous story, "The Arrival of Nanotech Memories."
Source: Eric Smalley, Technology Research News, May 5/12, 2004; and various websites